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uncontrolled copy when printed or downloaded. please refer to the 4d systems website for the latest revision of this document PICASO processor embedded graphics processor document date: 15 th january 2013 document revision: 1. 1 d atasheet 4d systems turning technology into art
PICASO processor contents 1. description ............................................................................................................................. 3 2. features ................................................................................................................................. 3 3. applications ........................................................................................................................... 4 4. pin configu ration and summary .............................................................................................. 5 5. pin description ....................................................................................................................... 8 display interface .................................................................................................................................... 8 5.1. s pi interface C memory card ................................................................................................................. 9 5.2. serial ports - com0, com1 uarts ........................................................................................................ 9 5.3. audio interface ..................................................................................................................................... 10 5.4. touch screen interface ........................................................................................................................ 10 5.5. gpio - general purpose io ................................................................................................................... 10 5.6. system pins .......................................................................................................................................... 11 5.7. 6. 4dgl - software language .................................................................................................... 12 7. in circuit serial programming icsp ........................................................................................ 12 8. PICASO architecture ............................................................................................................. 13 9. system registers memory map ............................................................................................. 14 10. memory cards - fat16 format ............................................................................................ 16 11. hardware tools .................................................................................................................. 16 4d programming cable ...................................................................................................................... 16 11.1. evaluation display modules ............................................................................................................... 16 11.2. 12. 4d systems - workshop 4 ide .............................................................................................. 17 workshop 4 C designer environment ................................................................................................ 17 12.1. workshop 4 C visi environment ......................................................................................................... 17 12.2. workshop 4 C visi genie environment .............................................................................................. 18 12.3. workshop 4 C serial environment ...................................................................................................... 18 12.4. 13. reference design ................................................................................................................ 19 14. package details ................................................................................................................... 20 15. pcb land pattern ............................................................................................................... 21 16. specifications and ratings ................................................................................................... 22 17. legal notice ........................................................................................................................ 23 18. contact information ............................................................................................................ 23
4d systems PICASO processor ? 2012 4d systems page 3 of 23 www.4dsystems.com.au PICASO processor 1. d escription the PICASO processor is a custom embedded 4dgl graphics controller designed to interface with many popular oled and lcd display panels. powerful graphics, text, image, animation and countless more features are built right inside the chip. it offers a simple plug - n - play interface to many 16 - bit 80 - series colour lcd and oled display s. the chip is designed to work with minimal design effort and all of the data and control signals are provided by the chip to interface directly to the display. simply choose your display and interface it to the PICASO on your application board. this off ers enormous advantage to the designer in development time and cost saving and takes away all of the burden of low level design. the PICASO belongs to a family of processors powered by a highly optimised soft core virtual engine, eve (extensible virtual e ngine). eve is a proprietary, high performance virtual processor with an extensive byte - code instruction set optimised to execute compiled 4dgl programs. 4dgl (4d graphics language) was specifically developed from ground up for the eve engine core. it is a high level language which is easy to learn and simple to understand yet powerful enough to tackle many embedded graphics applications. the device offers modest but comprehensive i/o features and can interface to i2c, serial, digital, buttons, joystick an d many more. provision is also made for a dedicated pwm audio output that supports audio wav files and complex sound generation. all of the display built - in driver libraries implement and share the same high - level function interface. this allows your gui application to be portable to different display controller types. 4d systems software development ide called workshop 4 is free and there are no licensing requirements. the PICASO processor offers one of the most flexible embedded graphics solutions avai lable. 2. f eatures ? low - cost oled, lcd and tft display graphics user interface solution. ? ideal as a standalone embedded graphics processor or interface to any host controller as a graphics co - processor. ? connect to any colour display that supports an 80- series 16 bit wide cpu interface. all data and control signals are provided. ? built in high performance virtual processor core (eve) with an extensive byte - code instruction set optimised for 4dgl, the high level 4d graphics language. ? comprehensive set of built in graphics and multimedia services. ? display full colour images, animations, icons and video clips. ? 14kb of flash memory for user code storage and 14kb of sram for user variables. ? 13 digital i/o pins. ? i2c interface (master). ? d0.d15, rd, wr, rs, cs C display interface ? fat16 file services. ? 2 asynchronous hardware serial ports with auto - baud feature. ? spi interface support for sdhc/sd memory card for multimedia storage and data logging purposes (micro - sd with up to 2gb and sdhc memory cards starting fro m 4gb and above). ? 4 - wire resistive touch panel interface. ? audio support for wave files and complex sound generation with a dedicated 16 - bit pwm audio output. ? 8 x 16 bit timers with 1 millisecond resolution. ? single 3.3 volt supply @25ma typical. ? available i n a 64 pin tqfp 10mm x 10mm package. ? rohs compliant.
4d systems PICASO processor ? 2012 4d systems page 4 of 23 www.4dsystems.com.au PICASO processor 3. applications ? general purposes embedded graphics. ? elevator control systems. ? point of sale terminals. ? electronic gauges and metres. ? test and measurement and general purpose instrumentation. ? industrial control and robotics. ? automotive system displays. ? gps navigation systems. ? medical instruments and applications. ? home appliances and smart home automation. ? security and access control systems. ? gaming equipment.. ? aviation systems. ? hmi with touch p anels.
4d systems PICASO processor ? 2012 4d systems page 5 of 23 www.4dsystems.com.au PICASO processor 4. pin configuration and summary PICASO processor pin out pin symbol i/o description 1 io1 i/o general purpose io1 pin. this pin is 5.0v tolerant. 2 xr a 4 - wire resistive touch screen right signal. connect this pin to xr or x+ signal of the touch panel. 3 yu a 4 - wire resistive touch screen up signal. connect this pin to yu or y+ signal of the touch panel. 4 sck o spi serial clock output. sd memory card use only. connect this pin to the spi serial clock (sck) signal of the memory card. 5 sdi i spi serial data input. sd memory card use only. connect this pin to the spi serial data out (sdo) signal of the memory card. 6 sdo o spi serial data output. sd memory card use only. connect this pin to the spi serial data in (sdi) signal of the memory card. 7 reset i master reset signal. connect a 4.7k resistor from this pin to vcc. 8 sdcs o sd memory - card chip select. sd memory card use only. connect this pin to the chip enable (cs) signal of the memory card. 9, 20, 25, 41 gnd p device ground. 10, 19, 26, 38, 57 vcc p device positive supply. i = input, o = output, p = power , a = analogue
4d systems PICASO processor ? 2012 4d systems page 6 of 23 www.4dsystems.com.au PICASO processor i = input, o = output, p = power , a = analogue PICASO processor pin out (continued) pin symbol i/o description 11 d5 i/o display data bus bit 5. 12 d4 i/o display data bus bit 4. 13 d3 i/o display data bus bit 3. 14 d2 i/o display data bus bit 2. 15 d1 i/o display data bus bit1. 16 d0 i/o display data bus bit 0. 17 d6 i/o display data bus bit 6. 18 d7 i/o display data bus bit 7. 21 d8 i/o display data bus bit 8. 22 d9 i/o display data bus bit 9. 23 d10 i/o display data bus bit 10. 24 d11 i/o display data bus bit 11. 27 d12 i/o display data bus bit 12. 28 d13 i/o display data bus bit 13. 29 d14 i/o display data bus bit 14. 30 d15 i/o display data bus bit 15. 31 rx1 i asynchronous serial port com1 receive pin, rx1. connect this pin to external serial device transmit (tx) signal. this pin is 5.0v tolerant. 32 tx1 o asynchronous serial port com1 transmit pin, tx1. connect this pin to external serial device receive (rx) signal. this pin is 5.0v tolerant. 33 tx0 o asynchronous serial port transmit pin, tx. connect this pin to host micro - controller serial receive (rx) signal. the host receives data from PICASO via this pin. this pin is 5 .0v tolerant. 34 rx0 i asynchronous serial port receive pin, rx. connect this pin to host micro - controller serial transmit (tx) signal. the host transmits data to PICASO via this pin. this pin is 5.0v tolerant. 35 res o display reset. PICASO initialises the display by strobing this pin low. connect this pin to the reset (res) signal of the display. 36 sda i/o i2c data in/out. 37 scl o i2c clock output. 39 clk1 i device clock input 1 of a 12mhz crystal. 40 clk2 o device clock input 2 of a 12mhz crystal. 42 bus6 i/o general purpose parallel i/o bus(0..7), bit 6. this pin is 5.0v tolerant. 43 bus7 i/o general purpose parallel i/o bus(0..7), bit 7. this pin is 5.0v tolerant. 44 io5/bus_wr i/o general purpose io5 pin. also used for bus_wr signal to write and latch the data to the parallel gpio bus(0..7). 45 audenb o audio enable. connect this pin to amplifier control. low: enable external audio amplifier. high : disable external audio amplifier. 46 audio o pulse width modulated (pwm) audio output. connect this pin to a 2 stage low pass filter then into an audio amplifier. 47 xl o 4 - wire resistive touch screen left signal. connect this pin to xl or x - signal of the touch panel. 48 yd o 4 - wire resistive touch screen bottom signal. connect this pin to yd or y - signal of the touch panel. 49 dcenb o dc - dc high voltage enable signal. this maybe the high voltage that drives the lcd backlight or the oled panel supply. high: enable dc - dc converter. low : disable dc - dc converter. 50 bus0 i/o general purpose parallel i/o bus(0..7), bit 0. this pin is 5.0v tolerant. 51 bus1 i/o general purpose parallel i/o bus(0..7), bit 1. this pin is 5.0v tolerant.
4d systems PICASO processor ? 2012 4d systems page 7 of 23 www.4dsystems.com.au PICASO processor i = input, o = output, p = power , a = analogue PICASO processor pin out (continued) pin symbol i/o description 52 bus2 i/o general purpose parallel i/o bus(0..7), bit 2. this pin is 5.0v tolerant. 53 bus3 i/o general purpose parallel i/o bus( 0..7), bit 3. this pin is 5.0v tolerant. 54 bus4 i/o general purpose parallel i/o bus(0..7), bit 4. this pin is 5.0v tolerant. 55 bus5 i/o general purpose parallel i/o bus(0..7), bit 5. this pin is 5.0v tolerant. 56 ref p internal voltage regulator filter capacitor. connect a 4.7uf to 10uf capacitor from this pin to ground. 58 wr o display write strobe signal. PICASO asserts this signal low when writing data to the display. connect this pin to the write (wr) signal of the display. 59 rd display read strobe signal. PICASO asserts this signal low when reading data from the display. connect this pin to the read (rd) signal of the display. 60 cs o display chip select. PICASO asserts this signal low when accessing the display. connect this pin to the chip select (cs) signal of the display. 61 rs o display register select. low: display index or status register is selected. high: display gram or register data is selected. connect this pin to the register select (rs or a0 or c/d or similar naming convention) signal of the display. 62 io4/bus_rd i/o general purpose io4 pin. also used for bus_rd signal to read and latch the data in to the parallel gpio bus(0..7). 63 io3 i/o general purpose io3 pin. this pin is 5.0v tolerant. 64 io2 i/o general purpose io2 pin. this pin is 5.0v tolerant.
4d systems PICASO processor ? 2012 4d systems page 8 of 23 www.4dsystems.com.au PICASO processor 5. pin description the PICASO processor provides both a hardware and a software interface. this section describes in detail the hardware interface pins of the device. display interface 5.1. the PICASO supports lcd and oled displays with an 80 - series 16 - bit wide cpu data interface. the connectivity to the display is easy an d straight forward. the PICASO generates all of the necessary timing to drive the display. cs rs rd wr operation 0 0 0 1 read display status register 0 0 1 0 write display index register 0 1 0 1 read display gram data 0 1 1 0 write register or gram data 1 x x x no operation display operation table d0 - d15 pins (display data bus): the display data bus (d0 - d15) is a 16 - bit bidirectional port and all display data writes and reads occur over this bus. other control signals such as rw, rd cs, and rs synchronise the data transfer to and from the display. cs pin (display chip select): the access to the display is only possible when the display chip select (cs) is asserted low. connect this pin to the chip select (cs) signal of the display. rs pin (display register select): the rs signal determines whether a register command or data is sent to the display. low : display index or status register is selected. high : display gram or register data is selected. connect this pin to the register select (rs) signal of the display. different displays utilise various naming conventions such as rs, a0, c/d or similar. be sure to check with your display manufacturer for the correct name and function. res pin (display reset): display reset. PICASO initialises the display by strobing this pin low. connect this pin to the reset (res) signal of the display. dcenb pin (external dc/dc enable): dc - dc high voltage enable signal. this maybe the high voltage that drives the lcd backlight or the oled panel supply. wr pin (display write): this is the display write strobe signal. the PICASO asserts this signal low when writing data to the display in conjunction with the display data bus (d0 - d15). connect this pin to the write (wr) signal of the display. item sym min typ max unit write low pulse twl 50 - - ns write high pulse twh 50 - - ns write bus cycle total twt 100 - - ns write data setup tds 25 - - ns rd pin (display read): this is the display read strobe signal. the PICASO asserts this signal low when reading data from the display in conjunction with the display data bus (d0 - d15). connect this pin to the read (rd) signal of the display.
4d systems PICASO processor ? 2012 4d systems page 9 of 23 www.4dsystems.com.au PICASO processor item sym min typ max unit read low pulse trl 150 - - ns read high pulse trh 150 - - ns read bus cycle total trt 300 - - ns read data hold tdh 75 - - ns spi interface C memory card 5.2. the PICASO supports sd, micro - sd and mmc memory cards via its hardware spi interface. the memory card is used for all multimedia file retrieval such as images, animations and movie clips and the spi interface is dedicated for this purpose only. the memory card can also be used as general purpose storage for data logging applications (raw and fat16 format support). support is availa ble for micro - sd with up to 2gb capacity and for high capacity hc memory cards starting from 4gb and above. sdi pin (spi serial data in): the spi serial data input (sdi). sd memory card use only. connect this pin to the spi serial data out (sdo) signal of the memory card. sdo pin (spi serial data out): the spi serial data output (sdi). sd memory card use only. connect this pin to the spi serial data in (sdi) signal of the memory card. sck pin (spi serial clock): the spi serial clock out put (sck). sd memory card use only. connect this pin to the spi serial clock (sck) signal of the memory card. sdcs pin (sd memory card chip select): sd memory - card chip select (sdcs). sd memory card use only. connect this pin to the chip enable (cs) signal of the memory card. serial ports - com0, com1 uarts 5.3. the PICASO processor has two dedicated hardware asynchronous serial ports that can communicate with external serial devices. the se are referred to as the com0 and the com1 serial ports. the primary features are: ? full - duplex 8 bit data transmission and reception. ? data format: 8 bits, no parity, 1 stop bit. ? independent baud rates from 300 baud up to 256k baud. ? single byte transmits and receives or a fully buffered service. the buffered service feature runs in the background capturing and buffering serial data without the user application having to constantly poll any of the serial ports. this frees up the applic ation to service other tasks. a single byte serial transmission consists of the start bit, 8 - bits of data followed by the stop bit. the start bit is always 0, while a stop bit is always 1. the lsb (least significant bit, bit 0) is sent out first follow ing the start bit. figure below shows a single byte transmission timing diagram. com0 is also the primary interface for 4dgl user program downloads and chip configuration pmmc programming. once the compiled 4dgl application program (eve byte - code) is d ownloaded and the user code starts executing, the serial port is then available to the user application. refer to section 7 . in - circuit - serial -
4d systems PICASO processor ? 2012 4d systems page 10 of 23 www.4dsystems.com.au PICASO processor programming (icsp ) for more details on pmmc /firmware programming. tx0 pin (serial transmit com0): asynchronous serial port com0 transmit pin, tx0. connect this pin to external serial device receive (rx) signal. this pin is 5.0v tolerant. rx0 pin (serial receive com0): asynchronous serial port com0 receive pin, rx0. connect this pin to external serial device transm it (tx) signal. this pin is 5.0v tolerant. tx1 pin (serial transmit com1): asynchronous serial port com1 transmit pin, tx1. connect this pin to external serial device receive (rx) signal. this pin is 5.0v tolerant. rx1 pin (serial receive com1): asynchro nous serial port com1 receive pin, rx1. connect this pin to external serial device transmit (tx) signal. this pin is 5.0v tolerant. audio interface 5.4. the exclusive audio support in the PICASO processor makes it better than its peers in the graphics processor range. pwm ensures better sound quality with a volume range of 8 to 127. a simple instruction empowers the user to execute the audio files. audio operation can be carried out simultaneously with the execution of other necessary instructions. for a complete list of audio commands please refer to the separate document titled ' PICASO - 4dgl - internal - functions.pdf '. audio pin (audio pwm output): external amplifier output pin. this pin provides a 16- bit dac/pwm audio output to use with an external audio amplifier. example circuit below provides a low cost implementation. if unused then this pin must be left open or floating. optional power audio circuit audenb pin (audio en able output): external amplifier enable pin. this pin provides on/off amplifier control. if unused then this pin must be left open or floating. low : enable external audio amplifier. high : disable external audio amplifier. touch screen interface 5.5. the PICASO supports 4 - wire resistive touch panels. the diagram below shows a simplified interface between the PICASO and a touch panel. xr pin (touch panel x - read input): 4 - wire resistive touch screen x - read analog signal. connect this pin to xr or x+ signal of the touch panel. xl pin (touch panel x - drive output): 4 - wire resistive touch screen x drive signal. connect this pin to xl or x - signal of the touch panel. yu pin (touch panel y - read input): 4 - wire resistive touch screen y - read analog signal. connect this pin to yu or y+ signal of the touch panel. yd pin (touch panel y - drive output): 4 - wire resistive touch screen y drive signal. connect this pin to yd or y - signal of the touch panel. gpio - general purpose io 5.6. there are 13 general purpose input/output (gpio) pins available to the user. these are grouped as io1..io5 and bus0..bus7. the 5 i/o pins (io1..io5), provide flexibility of individual bit operations while the 8 pins (bus0..bus7), known as gpio bus, serve collectively for byte wise ope rations. the io4 and io5 also act as strobing signals to control the gpio bus. gpio bus can be read or written by strobing a low pulse (50 nsec duration or greater)
4d systems PICASO processor ? 2012 4d systems page 11 of 23 www.4dsystems.com.au PICASO processor the io4/bus_rd or io5/bus_wr for read or write respectively. for detailed usage refer to th e separate document titled: ' PICASO - 4dgl - internal - functions.pdf '. io1 - io3 pins (3 x gpio pins): general purpose i/o pins. each pin can be individually set for input or an output. power - up reset default is all inputs. io4/bus_rd pin (gpio io4 or bus_rd pin): general purpose io4 pin. also used for bus_rd signal to read and latch the data in to the parallel gpio bus0..bus7. io5/bus_wr pin (gpio io5 or bus_wr pin): general purpose io5 pin. also used for bus_wr signal to write and latch the data to the para llel gpio bus0..bus7. bus0 - bus7 pins (gpio 8 - bit bus): 8 - bit parallel general purpose i/o bus. note: all gpio pins are 5.0v tolerant. system pins 5.7. vcc pins (device supply voltage): device supply voltage pins. these pins must be connected to a regulated supply voltage in the range of 3.0 volts to 3.6 volts dc. nominal operating voltage is 3.3 volts. gnd pins (device ground): device ground pins. these pins must be connected to system ground. reset pin (device master reset): device master reset pin. an active low pulse of greater than 2 micro - seconds will reset the device. connect a resistor (1k through to 10k, nominal 4.7k) from this pin to vcc. only use open collector type circuits to reset the device if an external reset is required. this pin is not driven low by any internal conditions. clk1, clk2 pins (device oscillator inputs): clk1 and clk2 are the device oscillator pins. connect a 12mhz at strip cut crystal with 22pf capacitors from each pin to gnd as shown in the diagram below.
4d systems PICASO processor ? 2012 4d systems page 1 2 of 23 www.4dsystems.com.au PICASO processor 6. 4dgl - software language the PICASO processor belongs to a family of processors powered by a highly optimised soft core virtual engine, eve (extensible virtual engine). eve is a proprietary, high performance virtual - machine with an extensive byte - code instruction set optimised to execute compiled 4dgl programs. 4dgl (4d graphics language) was specifically developed from ground up for the eve engine core. it is a high level language which is easy to learn and simple to understand yet powerful enough to t ackle many embedded graphics applications. 4dgl is a graphics oriented language allowing rapid application development, and the syntax structure was designed using elements of popular languages such as c, basic, pascal and others. programmers familiar w ith these languages will feel right at home with 4dgl. it includes many familiar instructions such as if..else..endif, while..wend, repeat..until, gosub..endsub, goto, print as well as some specialised instructions serin, serout, gfx_line, gfx_circle and m any more. for detailed information pertaining to the 4dgl language, please refer to the following documents: 4dgl - programmers - reference - manual.pdf PICASO - 4dgl - internal - functions.pdf to assist with the development of 4dgl applications, the workshop 4 ide combines a full - featured editor, a compiler, a linker and a down loader into a single pc - based application. it's all you need to code, test and run your applications. 7. in circuit serial programming icsp the PICASO processor is a custom graphics processor . all functionality including the high level commands are built into the chip. this chip level configuration is available as a firmware/ pmmc (personality - module - micro - code) file. a pmmc file contains all of the low level mi cro - code information (analogy of that of a soft silicon) which define the characteristics and functionality of the device. the ability of programm ing the device with a pmmc file provides an extremely flexible method of customising as well as upgrading it w ith future enhancements. a pmmc file can only be programmed into the device via its com0 serial port and an access to this must be provided for on the target application board. this is referred to as in circuit serial programming (icsp). figure below pro vides a typical implementation for the icsp interface. the pmmc file is programmed into the device with the aid of workshop 4, the 4d systems ide software (see section 1 2 ) . to provide a link between the pc and the icsp interface , a specific 4d programming cable is required and is available from 4d systems. using a non - 4d programming interface could damage your processor , and void your warranty. note: the PICASO processor is shipped blank and it must be programmed with the pmmc configuration file.
4d systems PICASO processor ? 2012 4d systems page 13 of 23 www.4dsystems.com.au PICASO processor 8. PICASO architecture the figure b elow illustrates the PICASO processor s architecture .
4d systems PICASO processor ? 2012 4d systems page 14 of 23 www.4dsystems.com.au PICASO processor 9. system registers memory map the following tables outline in detail the PICASO system registers and flags. PICASO s ystem registers and flags l abel a ddress u sage dec hex random_lo 32 0x20 random generator lo word random_hi 33 0x21 random generator hi word system_timer_lo 34 0x22 1msec system timer lo word system_timer_hi 35 0x23 1msec system timer hi word timer0 36 0x24 1msec user timer 0 timer1 37 0x25 1msec user timer 1 timer2 38 0x26 1msec user timer 2 timer3 39 0x27 1msec user timer 3 timer4 40 0x28 1msec user timer 3 timer5 41 0x29 1msec user timer 3 timer6 42 0x2a 1msec user timer 3 timer7 43 0x2b 1msec user timer 3 sys_x_max 44 0x2c display hardware x res - 1 sys_y_max 45 0x2d display hardware y res - 1 gfx_xmax 46 0x2e width of current orientation gfx_ymax 47 0x2f height of current orientation gfx_left 48 0x30 image left real point gfx_top 49 0x31 image top real point gfx_right 50 0x32 image right real point gfx_bottom 51 0x33 image bottom real point gfx_x1 52 0x34 image left clipped point gfx_y1 53 0x35 image top clipped point gfx_x2 54 0x36 image right clipped point gfx_y2 55 0x37 image bottom clipped point gfx_x_org 56 0x38 current x origin gfx_y_org 57 0x39 current y origin gfx_hilite_line 58 0x3a current multi line button hilite line gfx_line_count 59 0x3b count of lines in multiline button gfx_last_selection 60 0x3c last selected line gfx_hilight_backgroun d 61 0x3d multi button hilite background colour gfx_hilight_foregroun d 62 0x3e multi button hilite background colour gfx_button_foregroun d 63 0x3f store default text colour for hilite line tracker gfx_button_backgroun d 64 0x40 store default button colour for hilite line tracker gfx_button_mode 65 0x41 store current buttons mode gfx_toolbar_height 66 0x42 height above gfx_statusbar_height 67 0x43 height below gfx_left_gutter_width 68 0x44 width to left gfx_right_gutter_widt h 69 0x45 width to right gfx_pixel_shift 70 0x46 pixel shift for button depress illusion gfx_vect_x1 71 0x47 gp rect, used by multiline button to hilite required line
4d systems PICASO processor ? 2012 4d systems page 15 of 23 www.4dsystems.com.au PICASO processor PICASO s ystem registers and flags (continued) label address usage dec hex gfx_vect_y1 72 0x48 gfx_vect_x2 73 0x49 gfx_vect_y2 74 0x4a gfx_thumb_percent 75 0x4b size of slider thumb as percentage gfx_thumb_border_dar k 76 0x4c darker shadow of thumb gfx_thumb_border_lig ht 77 0x4d lighter shadow of thumb touch_xmincal 78 0x4e touch calibration value touch_ymincal 79 0x4f touch calibration value touch_xmaxcal 80 0x50 touch calibration value touch_ymaxcal 81 0x51 touch calibration value img_width 82 0x52 width of currently loaded image img_height 83 0x53 height of currently loaded image img_frame_delay 84 0x54 if image, else inter frame delay for movie img_flags 85 0x55 bit 4 determines colour mode, other bits reserved img_frame_count 86 0x56 count of frames in a movie img_pixel_count_lo 87 0x57 count of pixels in the current frame img_pixel_count_hi 88 0x58 count of pixels in the current frame img_current_frame 89 0x59 last frame shown media_address_lo 90 0x5a micro - sd byte address lo media_address_hi 91 0x5b micro - sd byte address hi media_sector_lo 92 0x5c micro - sd sector address lo media_sector_hi 93 0x5d micro - sd sector address hi media_sector_count 94 0x5e micro - sd number of bytes remaining in sector text_xpos 95 0x5f text current x pixel position text_ypos 96 0x60 text current y pixel position text_margin 97 0x61 text left pixel pos for carriage return txt_font_type 98 0x62 font type, 0 = system font, else pointer to user font txt_font_max 99 0x63 max number of chars in font txt_font_offset 100 0x64 starting offset (normally 0x20) txt_font_width 101 0x65 current font width txt_font_height 102 0x66 current font height gfx_touch_region_x1 103 0x67 touch capture region gfx_touch_region_y 104 0x68 gfx_touch_region_x2 105 0x69 gfx_touch_region_y2 106 0x6a gfx_clip_left_val 107 0x6b left clipping point (set with gfx_clipwindow(...) gfx_clip_top_val 108 0x6c top clipping point (set with gfx_clipwindow(...) gfx_clip_right_val 109 0x6d right clipping point (set with gfx_clipwindow(...) gfx_clip_bottom_val 110 0x6e bottom clipping point (set with gfx_clipwindow(...) gfx_clip_left 111 0x6f current clip value (reads full size if clipping turned off) gfx_clip_top 112 0x70 current clip value (reads full size if clipping turned off) gfx_clip_right 113 0x71 current clip value (reads full size if clipping turned off) gfx_clip_bottom 114 0x72 current clip value (reads full size if clipping turned off) gram_pixel_count_lo 115 0x73 lo word of count of pixels in the set gram area gram_pixel_count_hi 116 0x74 hi word of count of pixels in the set gram area note: these registers are accessible with peekw and pokew functions.
4d systems PICASO processor ? 2012 4d systems page 16 of 23 www.4dsystems.com.au PICASO processor 10. memory cards - fat16 format the PICASO processor uses off the shelf standard sdhc/sd/micro - sd memory cards with up to 2gb capacity usable with fat16 formatting. for any fat file related operations, before the memory card can be used it must first be formatted with fat16 option. the formatting of the card can be done on any pc system with a card reader. select the appropriate drive and choose the fat16 (or just fat in some systems) option when formatting. the card is now ready to be used in the PICASO based application. the PICASO processor also supports high capacity hc memory cards (4gb and above). the available capacity of sd - hc cards varies according to the way the card is partitioned and the commands used to access it. the fat partition is always first (if it exists) and can be up to t he maximum size permitted by fat16. windows 7 will format fat16 up to 4gb. windows xp will format fat16 up to 2gb and the windows xp command prompt will format fat16 up to 4gb. 11. hardware tools the following hardware tools are required for full control of the PICASO processor . 4d programming cable 11.1. the 4d programming cable is an essential hardware tool to program, customise and test the PICASO processor . the 4d programming cable is used to program a new firmware/ pmmc and downloading compiled 4dgl code into the processor . it even serves as an interface for communicating serial data to the pc . t he 4d programming cable is available from 4d systems , www.4dsystems.com.au evaluation display modules 11.2. the following modules, available from 4d systems, can be used for evaluation p urposes to discover what the PICASO processor has to offer. ulcd - 24ptu C 2.4 intelligent PICASO display other modules, such as the 2.8, 3.2 and 3.2 wide verisions are also available. please contact 4d systems for more information, or visit the 4d systems website, www.4dsystems.com.au
4d systems PICASO processor ? 2012 4d systems page 17 of 23 www.4dsystems.com.au PICASO processor 12. 4d systems - workshop 4 ide works hop 4 is a comprehensive software ide that provides an integrated software develop ment platform for all of the 4d family of processors and modules. the ide combines the edi tor, compiler, linker and down - loader to develop complete 4dgl application code. all user applicati on code is developed within the workshop 4 ide. the workshop 4 ide supports multiple development environments for the user, to cater for different user requirements and skill level. ? the designer environment enables the user to write 4dgl code in its natural f orm to program the PICASO module . ? a visual programming experience , suitably called visi , enables drag - and - drop type placement of objects to assist with 4dgl code generation and allows the user to visualise how the display will look while being developed . ? an advanced environment called visi - genie doesnt require any 4dgl coding at all , it is all done automatically for you. simply lay the display out with the objects you want, set the events to drive them and the code is written for you automatically. visi - genie provides the latest rapid development experience from 4d systems. ? a serial environment is also provided to transform the PICASO module into a slave serial module, allowing the user to control the display from any host microcontroller or device with a serial port. the workshop 4 ide is available from the 4d systems website. www.4dsystems.com.au for a comprehensive manual on the workshop 4 ide software along with other documents , refer to the documentation from the 4d systems website , on the workshop 4 product page . workshop 4 C designer environment 12.1. choose the designer environment to write 4dgl code in its raw form . the des igner environment provides the user with a simple yet effective programming environment where pure 4dgl code can be written, compiled and downloaded to the PICASO . workshop 4 C visi environment 12.2. visi was designed to make the creation of graphical displays a more visual experience. visi is a great software tool that allows the user to see the instant results of their desired graphical layout. additionally, there is a selection of inbuilt dials, gauges and meters that can simply be placed onto the simulated module display. from here each object can have its properties edited, and at the click of a button all relevant 4dgl code associated with that object is produced in the user program. the user can then wr ite 4dgl code around these objects to utilise them in the way they choose.
4d systems PICASO processor ? 2012 4d systems page 18 of 23 www.4dsystems.com.au PICASO processor workshop 4 C visi genie environment 12.3. visi genie is a breakthrough in the way 4d systems graphic display modules are programmed. it is an environment like no other, a code - le ss programming environment that provides the user with a rapid visual experience, enabling a simple gui application to be written from scratch in literally seconds. visi genie does all the background coding, no 4dgl to learn, it does it all for you. pick and choose the relevant objects to place on the display, much like the visi environment, yet without having to write a single line of code. each object has parameters which can be set, and configurable events to animate and drive other objects or comm unicate with external devices. simply place an object on the screen, position and size it to suit, set the parameters such as colour, range, text, and finally select the event you wish the object to be associated with, it is that simple. in seconds you c an transform a blank display into a fully animated gui with moving sliders, animated press and release buttons, and much more. all without writing a single line of code! visi genie provides the user with a feature rich rapid development environment, secon d to none. workshop 4 C serial environment 12.4. the serial environment in the workshop 4 ide provides the user the ability to transform the PICASO into a slave serial graphics controller. this enables the user to use their favourite microcontroller or se rial device as the host, without having to learn 4dgl or program in a separate ide. once the PICASO is configured and downloaded to from the serial environment, simple graphic commands can be sent from the users host microcontroller to display primitives, images, sound or even video. refer to the serial command set reference manual from the workshop 4 product page on the 4d systems website for a complete listing of all the supported serial commands by default, each module shipped from the 4d systems factory will come pre - programmed ready for use in the serial mode.
4d systems PICASO processor ? 2012 4d systems page 19 of 23 www.4dsystems.com.au PICASO processor 13. reference design
4d systems PICASO processor ? 2012 4d systems page 20 of 23 www.4dsystems.com.au PICASO processor 14. package details
4d systems PICASO processor ? 2012 4d systems page 21 of 23 www.4dsystems.com.au PICASO processor 15. pcb land pattern
4d systems PICASO processor ? 2012 4d systems page 22 of 23 www.4dsystems.com.au PICASO processor 16. specifications and ratings absolute maximum ratings operating ambient temperature ............................................................................................... . . .. - 40 c to + 85 c storage temperature ................................................................................................................ . ....... - 65 c + 150 c voltage on vcc with respect to gnd ..................................................................... ........................ .... - 0.3v to 4.0v maximum current out of gnd pin .................................................................................. ........................ .... 300ma maximum current into vcc pin ................................................................................. ......................... ........ 250ma maximum output current sunk/sourced by any pin .............................................................. ..................... . 4. 0ma total power dissipation ..................................................................................................... .. .......................... 1.0w note : stresses above those listed here may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the recommended operation listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affe ct device reliability. recommended operating conditions parameter conditions min typ max units supply voltage (vcc) 3 .0 3.3 3.6 v operating temperature - 40 -- + 80 c external crystal (xtal) -- 12.00 -- mhz input low voltage (vil) vcc = 3.3v, all pins vgnd -- 0.2vcc v input high voltage (vih) vcc = 3.3v, non 5v tolerant pins 0.8vcc -- vcc v input high voltage (vih) all gpio pins, rx0 and tx0 pins 0.8vcc -- 5.5 v global characteristics based on operating conditions parameter conditions min typ max units supply current (icc) vcc = 3.3v -- 50 90 ma internal operating frequency xtal = 12.00mhz -- 48.00 -- mhz output low voltage (vol) vcc = 3.3v, iol = 3.4ma -- -- 0.4 v output high voltage (voh) vcc = 3.3v, iol = - 2.0ma 2.4 -- -- v a/d converter resolution xr, yu pins 8 -- 10 bits capacitive loading clk1, clk2 pins -- -- 15 pf capacitive loading all other pins -- -- 50 pf flash memory endurance pmmc programming -- 10000 -- e/w
4d systems PICASO processor ? 2012 4d systems page 23 of 23 www.4dsystems.com.au PICASO processor ordering information order code: PICASO package: tqfp - 64, 10mm x 10mm packaging: trays of 160 pieces 17. legal notice proprietary information the information contained in this document is the property of 4d systems pty. ltd. and may be the subject of patents pending or granted, and must not be copied or disclosed without prior written permission. 4d systems endeavours to ensure that the information in this document is correct and fairly stated but does not accept liability for any error or omission. the development of 4d systems products and services is continuous and published information may not be up to date. it is important to check t he current position with 4d systems. 4d systems reserves the right to modify, update or makes changes to specifications or written material without prior notice at any time. all trademarks belong to their respective owners and are recognised and acknowledg ed. disclaimer of warranties & limitation of liability 4d systems makes no warranty, either expressed or implied with respect to any product, and specifically disclaims all other warranties, including, without limitation, warranties for merchantability, n on - infringement and fitness for any particular purpose. information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that yo ur application meets with your specifications. in no event shall 4d systems be liable to the buyer or to any third party for any indirect, incidental, special, consequential, punitive or exemplary damages (including without limitation lost profits, lost sa vings, or loss of business opportunity) arising out of or relating to any product or service provided or to be provided by 4d systems, or the use or inability to use the same, even if 4d systems has been advised of the possibility of such damages. 4d syste ms products are not fault tolerant nor designed, manufactured or intended for use or resale as on line control equipment in hazardous environments requiring fail C safe performance, such as in the operation of nuclear facilities, aircraft navigation or com munication systems, air traffic control, direct life support machines or weapons systems in which the failure of the product could lead directly to death, personal injury or severe physical or environmental damage (high risk activities). 4d systems a nd its suppliers specifically disclaim any expressed or implied warranty of fitness for high risk activities. use of 4d systems products and devices in 'high risk activities' and in any other application is entirely at the buyers risk, and the buyer agre es to defend, indemnify and hold harmless 4d systems from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any 4d systems intellectual property rights. 18. contact information for technical support: support@4dsystems.com.au for sales support: sales@4dsystems.com.au website: www.4dsystems.com .au copyright 4d systems pty. ltd. 2000 - 2012.
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